Electrostatic discharge event protection for an integrated circuit
AssigneeArm Limited
InventorsSteven Broome, Jason Thurston
Life of this patent
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AssigneeArm Limited
InventorsSteven Broome, Jason Thurston
Estimating the term…
An integrated circuit 2 is provided with a clamp transistor 20 for providing electrostatic discharge event protection. A detector circuit 28 produces a clamp control signal for switching the clamp transistor 20 to a conductive state so as to provide the electrostatic discharge protection. The detector circuit 28 also generates an electrostatic discharge event signal 36 which is distributed elsewhere within the integrated circuit 2 and controls a protection circuit element 60, 64, 44 to force a processing control signal 40, 52 of a signal processing transistor 38, 54 into a state in which the signal processing transistor 38, 54 is more resistant to electrostatic discharge damage. The signal processing transistors 38, 54 may be P-type field effect transistors associated with a receiver 14 or a transmitter 12 connected to an external signal communication line. The use of this active protection controlled by the electrostatic discharge event signal 36 permits smaller protection diodes 22, 24 to be use with such communication signal lines and/or provide for increased electrostatic discharge protection.
An integrated circuit comprising:
An integrated circuit comprising:
A method of protecting an integrated circuit from electrostatic discharge events, said integrated circuit having a power supply rail, a ground rail and at least one signal processing transistor controlled by a processing control signal to perform signal processing, said method comprising the steps of:
Dependencies are inferred from the claim text.