Display panel driving circuit and display apparatus

A display panel driving circuit comprising a plurality of circuit blocks aligned in a row direction, each circuit block including a plurality of upstream signal circuits and a plurality of downstream signal circuits respectively corresponding to the plurality of upstream signal circuits, wherein in each circuit block, a signal is transmitted from each upstream signal circuit to the corresponding downstream signal circuit,

• wherein:
• in each of the plurality of circuit blocks, the plurality of upstream signal circuits are aligned in a column direction;
• in each of the plurality of circuit blocks, an in-block common wiring is provided, to which all of the plurality of upstream signal circuits of the circuit block are connectable;
• and
• the signal from each of the plurality of upstream signal circuits is transmitted in a time-division manner via the in-block common wiring.

A display panel driving circuit comprising a plurality of circuit blocks aligned in a row direction, each circuit block including a plurality of upstream signal circuits, and a plurality of downstream signal circuits respectively corresponding to the plurality of upstream signal circuits, and one signal relay circuit, wherein a signal is transmitted from each downstream signal circuit to the signal relay circuit,

• wherein:
• in each of the plurality of circuit blocks, the plurality of downstream signal circuits is aligned in a column direction;
• each of the plurality of circuit blocks includes a universally-shared common wiring to which all the downstream signal circuits of the circuit block are connectable;
• and
• the signal from each of the plurality of downstream signal circuits is transmitted in a time-division manner via the universally-shared common wiring.

A display panel driving circuit comprising a plurality of circuit blocks aligned in a row direction, each circuit block including an upstream circuit and a downstream circuit, wherein signal transmission is carried out between the upstream circuit and the downstream circuit that belong to the same circuit block, wherein:

• in each of the plurality of circuit blocks, a plurality of upstream circuits and a plurality of downstream circuits are aligned in a column direction;
• an inter-block common wiring is provided for every two circuit blocks;
• and
• signal transmission in one of the two circuit blocks and signal transmission in the other of the two circuit blocks are carried out via the inter-block common wiring at respective timings that are different from each other.