Method of processing signal data with corrected clock phase offset
AssigneeArm Limited
InventorsJunqi Hua, Alberto Baldisserotto, Steven White
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Abstract
The present invention provides a method of processing signal data comprising generating a first clock signal and a second clock signal and processing the signal data using the first clock signal and the second clock signal. While processing the signal data, the phase difference between the first clock signal and the second clock signal is measured and corrected for so that a target phase difference between the first clock signal and the second clock signal is maintained.
Claims17
A method of processing signal data comprising the steps of:
- generating a first clock signal and a second clock signal;
- processing said signal data using said first clock signal and said second clock signal;
- while processing said signal data, measuring a measured phase difference between said first clock signal and said second clock signal;
- and
- adjusting a current phase offset of at least one of said first clock signal and said second clock signal in dependence upon said measured phase difference,
- such that a target phase difference between said first clock signal and said second clock signal is maintained.
A signal data processing apparatus comprising:
- clock generating circuitry configured to generate a first clock signal and a second clock signal
- processing circuitry responsive to said first clock signal and said second clock signal to process said signal data;
- measuring circuitry operating while said processing circuitry processes said signal data to measure a measured phase difference between said first clock signal and said second clock signal;
- and
- adjusting circuitry configured to adjust a current phase offset of at least one of said first clock signal and said second clock signal in dependence upon said measured phase difference,
- such that a target phase difference between said first clock signal and said second clock signal is maintained.
A signal data processing apparatus comprising:
- generating means for generating a first clock signal and a second clock signal
- processing means for processing said signal data using said first clock signal and said second clock signal;
- measuring means for, while processing said signal data, measuring a measured phase difference between said first clock signal and said second clock signal;
- and
- adjusting means for adjusting a current phase offset of at least one of said first clock signal and said second clock signal in dependence upon said measured phase difference,
- such that a target phase difference between said first clock signal and said second clock signal is maintained.
Dependencies are inferred from the claim text.