# US 2009/0267635 A1 · Method and apparatus for high density superconductor circuit

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- Number: US 2009/0267635 A1
- Document ID: US20090267635A1
- Status: Published application
- Kind: A1
- Application number: 12/111,035
- Filed: 2008-04-28
- Published: 2009-10-29
- Earliest claimed: 2008-04-28
- Assignees: Northrop Grumman Corporation
- Inventors: Quentin P. Herr; James E. Baumgardner; Aaron A. Pesetski
- Web page: https://patentgrep.com/patent/US20090267635A1

## CPC

- H03K 3/38: by the use, as active elements, of superconductive devices
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

The disclosure relates to a method for providing a logic circuit element. The method includes arranging a series of Josephson junctions between a first Josephson junction and a second Josephson junction, the first Josephson junction having a first critical current (Ic1) and the second Josephson junction having a second critical current (Ic2); providing a working current to the first Josephson junction, the working current transmitting to the second Josephson junction through the series of the Josephson junctions; wherein the working current is sufficiently high to trigger the second Josephson junction while sufficiently low to not disturb super-conductivity of the series of intermediate Josephson junctions.

## Claims

### Claim 1

A single flux quantum digital logic circuit comprising:
a first Josephson junction having a first critical current (Ic1);
a second Josephson junction having a second critical current (Ic2);
a series of intermediate Josephson junctions interposed between the first Josephson junction and the second Josephson junction, the series of intermediate Josephson junctions receiving a working current from the first Josephson junction and directing the working current to the second Josephson junction;
wherein the working current is sufficiently high to create a desirable signal to the second Josephson junction while sufficiently low to not disturb super-conductivity of the series of intermediate Josephson junctions.

### Claim 2 (depends on 1)

The circuit of claim 1, wherein the working current value is equal or less than one of the first critical current Ic1 or the second critical current Ic2.

### Claim 3 (depends on 1)

The circuit of claim 1, wherein the working current value is equal or less than one of the first critical current Ic1 and the second critical current Ic2.

### Claim 4 (depends on 1)

The circuit of claim 1, wherein the series of intermediate Josephson junctions have substantially no resistance at the working current.

### Claim 5 (depends on 1)

The circuit of claim 1, wherein the series of intermediate Josephson junctions further comprise at least one Josephson junction.

### Claim 6 (depends on 1)

The circuit of claim 1, wherein the series of intermediate Josephson junctions further comprises a plurality of Josephson junctions connected in series.

### Claim 7 (depends on 1)

The circuit of claim 1, wherein the product of the Josephson junction critical current and the inductance through the series of intermediate Josephson junctions remains constant as the designed value of the critical current changes.

### Claim 8

A method for conducting a logic circuit, the method comprising:
arranging a series of Josephson junctions between a first Josephson junction and a second Josephson junction, the first Josephson junction having a first critical current (Ic1) and the second Josephson junction having a second critical current (Ic2);
providing a working current to the first Josephson junction, the working current transmitting to the second Josephson junction through the series of the Josephson junctions;
wherein the working current is sufficiently high to create a desirable signal at the second Josephson junction while sufficiently low to not disturb super-conductivity of the series of intermediate Josephson junctions.

### Claim 9 (depends on 8)

The method of claim 8, wherein the series of Josephson junctions is connected in series with the first Josephson junction and the second Josephson junction.

### Claim 10 (depends on 8)

The method of claim 8, wherein the working current has a value equal or less than one of the first critical current Ic1 or the second critical current Ic2.

### Claim 11 (depends on 8)

The circuit of claim 8, wherein the working current value is equal or less than the first critical current Ic1 and the second critical current Ic2.

### Claim 12 (depends on 8)

The circuit of claim 8, wherein the series of intermediate Josephson junctions have substantially no resistance at the working current.

### Claim 13 (depends on 8)

The circuit of claim 8, wherein the series of intermediate Josephson junctions further comprise at least one Josephson junction.

### Claim 14 (depends on 1)

The circuit of claim 1, wherein the series of intermediate Josephson junctions further comprise a plurality of Josephson junctions connected in series.

### Claim 15 (depends on 1)

The circuit of claim 1, wherein the product of the critical current and the inductance in the series of Josephson junctions remains constant as the designed value of the critical current changes.