Integrated test waveform generator (twg) and customer waveform generator (cwg), design structure and method

Abstract

Disclosed are embodiments of a clock generation circuit, a design structure for the circuit and an associated method that provide deskewing functions and that further provide precise timing for both testing and functional operations. Specifically, the embodiments incorporate a deskewer circuit that is capable of receiving waveform signals from both an external waveform generator and an internal waveform generator. The external waveform generator can generate and supply to the deskewer circuit a pair of waveform signals for functional operations. The internal waveform generator can be uniquely configured with control logic and counter logic for generating and supplying a pair of waveform signals to the deskewer circuit for any one of built-in self-test (BIST) operations, macro-test operations, other test operations or functional operations. The deskewer circuit can selectively gate an input clock signal with the waveform signals from either the external or internal waveform generator in order to generate the required output clock signal.

Dependencies are inferred from the claim text.