Code Evaluation for In-Order Processing
AssigneeQUALCOMM Incorporated
InventorsMing Hu, Ramakrishnan Ganesh Sundaram, Rajiv B. Narayan, Satya Jayaraman
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Abstract
Systems and methods of code evaluation for in-order processing are disclosed. In an embodiment, the method includes identifying a first instruction having multiple execution source paths. The method also includes generating a first execution path model identifying an execution order of multiple instructions based on a first condition and generating a second execution path model identifying an execution order of a second instruction based on a second condition. The method includes evaluating at least one of the execution path models to identify a hazard condition.
Claims23
A method of evaluating program code for a pipeline execution processor with in-order execution, the method comprising:
- receiving program code for the processor;
- identifying a first execution queue that identifies an execution order of multiple instructions based on a first condition;
- identifying a second execution queue that identifies an execution order of a second instruction based on a second condition, wherein the first execution queue and the second execution queue include at least one common instruction;
- evaluating the first execution queue and the second execution queue to identify a hazard condition;
- and
- reporting the hazard condition.
A method of evaluating program code for a pipeline execution processor with in-order execution, the method comprising:
- identifying a first instruction having multiple execution source paths;
- generating a first execution path model identifying an execution order of multiple instructions based on a first condition;
- generating a second execution path model identifying an execution order of a second instruction based on a second condition, wherein the first execution path model and the second execution path model include the first instruction;
- and
- evaluating at least one of the execution path models to identify a hazard condition.
A system comprising:
- a memory to store program instructions for an in-order processor;
- modeling means for determining at least two parallel execution path models of the program instructions based on at least one conditional branching instruction of the program instructions;
- evaluation means for identifying a hazard condition in at least one of the parallel execution path models;
- and
- reporting means to report the hazard condition.
A processor readable medium having operational instructions that are executable by a processor, the operational instructions comprising:
- instructions to identify a conditional branch in a computer program written to be executed at an in-order processor;
- instructions to evaluate a first execution path based on a first condition of the conditional branch and to evaluate a second execution path based on a second condition of the conditional branch;
- and
- instructions to report a hazard condition associated with either of the first execution path and the second execution path.
Dependencies are inferred from the claim text.