Low power, integrated radio transmitter and receiver

An integrated transceiver comprising:

• radio frequency (RF) receiver circuitry for receiving an input data modulated signal, said receiver circuitry comprising a first phase-locked loop (PLL) having a first voltage-controlled oscillator (VCO), wherein said first phase-locked loop, in a closed-loop state, phase-locks said first voltage-controlled oscillator to provide a VCO output signal having a frequency that is a multiple of a first frequency reference and wherein, when said first phase-locked loop is in an opened-loop state, said first voltage-controlled oscillator is injection-locked by said input data modulated signal;
• and
• radio frequency (RF) transmitter circuitry for transmitting an output data modulated signal, said transmitter circuitry comprising a second phase-locked loop (PLL) having a second voltage-controlled oscillator (VCO) and configured for open-loop direct VCO modulation, wherein said second phase-locked loop, in a closed-loop state, phase-locks said second voltage-controlled oscillator to provide a VCO output signal having a frequency that is a multiple of a second frequency reference and wherein, when said second phase-locked loop is in an opened-loop state, said second phase-locked loop is configured for modulation of said second voltage-controlled oscillator by a data signal to generate said output data modulated signal, wherein one or more components of said second phase-locked loop, other than said second voltage-controlled oscillator, are disabled to save power when said second phase-locked loop is in said opened-loop state.

A method comprising:

• alternating between a closed-loop state and an opened-loop state of a first phase-locked loop comprising a first voltage-controlled oscillator;
• in a closed-loop state of the first phase-locked loop, phase-locking said first voltage-controlled oscillator to provide a first VCO output signal having a frequency that is a multiple of a first frequency reference;
• and
• in the opened-loop state of the first phase-locked loop:
• receiving an input data modulated signal;
• and
• injection-locking said first voltage-controlled oscillator with said input data modulated signal.