Semiconductor memory device and method for generating pipe-in signal thereof
AssigneeHynix Semiconductor Inc.
InventorsKyoung-Nam KIM, Ho-Youb CHO
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Abstract
A semiconductor memory device includes a preliminary signal generator configured to output a preliminary pipe-in signal enabled when a read command is applied. A delay unit is configured to delay the preliminary pipe-in signal and output the delayed preliminary pipe-in signal to match the timing of output data. A pipe-in signal generator generates a pipe-in signals that are enabled between a predetermined enable point and a next enable point of the delayed preliminary pipe-in signal output.
Claims10
A semiconductor memory device, comprising:
- a preliminary signal generator configured to output a preliminary pipe-in signal enabled when a read command is applied;
- a delay unit configured to delay the preliminary pipe-in signal and output the delayed preliminary pipe-in signal to match timing with output data;
- and
- a pipe-in signal generator configured to generate a plurality of pipe-in signals enabled between a predetermined enable point and a next enable point of the delayed preliminary pipe-in signal output.
A method for generating a pipe-in signal in a semiconductor memory device, the method comprising:
- enabling a preliminary pipe-in signal in response to the read command, when a read command is applied,;
- delaying the preliminary pipe-in signal to match timing with output data;
- and
- generating a plurality of pipe-in signals enabled between a predetermined enable point and a next enable point of the delayed preliminary pipe-in signal.
Dependencies are inferred from the claim text.