Apparatus and method for outputting data in semiconductor integrated circuit
AssigneeHynix Semiconductor Inc.
InventorByung Deuk Jeon
Life of this patent
Estimating the term…
Abstract
An apparatus for outputting data in a semiconductor integrated circuit includes a clock generation block configured to activate a first clock signal for outputting a data signal and a second clock signal for outputting a data strobe signal based on a predetermined timing, and a data output block configured to latch a pre-data signal and a pre-data strobe signal in response to the first clock signal and the second clock signal, respectively.
Claims18
An apparatus for outputting data in a semiconductor integrated circuit, comprising:
- a clock generation block configured to activate a first clock signal for outputting a data signal and a second clock signal for outputting a data strobe signal based on a predetermined timing;
- and
- a data output block configured to latch a pre-data signal and a pre-data strobe signal in response to the first clock signal and the second clock signal, respectively and output the data signal and the data strobe signal.
A method for outputting data in a semiconductor integrated circuit, comprising the steps of:
- activating a first clock signal for outputting a data signal and a second clock signal for outputting a data strobe signal with a predetermined time difference;
- and
- outputting the data signal by latching a pre-data signal in response to the first clock signal and the data strobe signal by latching a pre-data strobe signal in response to the second clock signal.
An apparatus for outputting data in a semiconductor integrated circuit, comprising:
- a control signal generation section configured to determine an activation interval of a control signal according to a set signal and a reset signal, the set signal generated in response to activation of an output enable signal;
- a reset signal generation section configured to output a delay locked loop clock signal as the reset signal, the delay locked loop clock signal corresponding to an activation interval of the output enable signal;
- and
- a clock output section configured to output a second clock signal by inverting the reset signal, and to output a first clock signal by inverting the reset signal in response to the control signal;
- a plurality of latches configured to latch a pre-data signal in response to the first clock signal and the second clock signal, and to output a data signal and a data strobe signal having a predetermined time difference.
Dependencies are inferred from the claim text.