Hybrid decoding using multiple turbo decoders in parallel
AssigneeTelefonaktiebolaget L M Ericsson (publ)
InventorXiaohui Wang
Life of this patent
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Abstract
A method and receiver for Turbo decoding a received Turbo encoded bitstream with a first channel decoder which uses a first Turbo decoding algorithm to produce a first decoded bitstream and a first error measure, and a second channel decoder which uses a second Turbo decoding algorithm to produce a second decoded bitstream and a second error measure. The decoders are operable in parallel. A selector is arranged to select, for further processing in the receiver, the decoded bitstream and the error measure from the decoder which has the most favorable error measure.
Claims17
A method for Turbo decoding a received Turbo encoded bitstream in a communication system, the method comprising the steps of:
- decoding the received bitstream using a first Turbo decoding algorithm to produce a first decoded bitstream and a first error measure, in parallel with decoding the received bitstream using a second Turbo decoding algorithm, which is different from the first decoding algorithm, for producing a second decoded bitstream and a second error measure;
- selecting, for further processing in a receiver, the decoded bitstream and error measure from the decoding algorithm which produces the most favorable error measure,
- wherein, in the decoding step, the first error measure is determined on basis of a number of error indicating Cyclic Redundancy Check flags associated with the first decoded bitstream and the second error measure is determined on basis of a number of error indicating Cyclic Redundancy Check flags associated with the second decoded bitstream, and wherein, in the selecting step, the most favorable error measure is chosen as the error measure corresponding to the smallest number of error indicating Cyclic Redundancy Check flags.
A receiver comprising a channel decoding unit for Turbo decoding a received Turbo encoded bitstream in a communication system, wherein the channel decoding unit comprises:
- a first channel decoder which is arranged to use a first Turbo decoding algorithm to produce a first decoded bitstream and a first error measure, and
- a second channel decoder which is arranged to use a second Turbo decoding algorithm, which is different from the first Turbo decoding algorithm, to produce a second decoded bitstream and a second error measure,
- wherein the decoders are operated in parallel, and
- wherein the decoding unit further comprises a selector which is arranged to select, for further processing in the receiver, the decoded bitstream and the error measure from the decoder which has the most favorable error measure,
- wherein the receiver is arranged to determine the first error measure on basis of a number of error indicating Cyclic Redundancy Check flags associated with the first decoded bitstream and the second error measure on basis of a number of error indicating Cyclic Redundancy Check flags associated with the second decoded bitstream, and wherein the selector is arranged to select the most favorable error measure as the error measure corresponding to the smallest number of error indicating Cyclic Redundancy Check flags.
Dependencies are inferred from the claim text.