Integrated circuit and method for reading the content of a memory cell
AssigneeQimonda AG
InventorMarco Goetz
Life of this patent
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Abstract
In an embodiment, an integrated circuit having a memory cell arrangement is provided. The memory cell arrangement may include at least one memory cell, a read circuit configured to read the memory cell, wherein the read circuit includes an output holding circuit configured to hold a memory cell content signal read from the memory cell, and an enable circuit configured to provide the memory cell content signal at an output of the read circuit only in case the memory cell fulfills a predefined criterion.
Claims24
An integrated circuit comprising:
- at least one memory cell;
- a read circuit configured to read the memory cell, wherein the read circuit comprises an output holding circuit configured to hold a memory cell content signal read from the memory cell;
- and
- an enable circuit configured to provide the memory cell content signal at an output of the read circuit only when the memory cell fulfills a predefined criterion.
A method for reading a memory cell, the method comprising:
- reading the memory cell, thereby providing a memory cell content signal;
- determining whether the memory cell fulfills a predetermined criterion;
- and
- providing the memory cell content signal at an output of a read circuit of the memory cell arrangement only if the memory cell fulfills the predefined criterion.
An integrated circuit comprising:
- at least one memory cell;
- a read circuit configured to read the memory cell, wherein the read circuit comprises a holding circuit configured to hold a signal read from the memory cell;
- a data bus coupled with an output of the read circuit;
- and
- a circuit configured to provide a memory cell content signal at an output of the read circuit only in case the memory cell is a valid bit memory cell.
A method for reading content of a memory cell of a memory cell arrangement in an integrated circuit, the method comprising:
- reading the content of the memory cell, thereby providing a memory cell content signal;
- determining whether the memory cell fulfills a predetermined criterion before the memory cell content signal is provided to a data bus of the memory cell arrangement;
- and
- blocking the memory cell content signal before it reaches an output of a read circuit of the memory cell arrangement in case the memory cell does not fulfill the predefined criterion.
Dependencies are inferred from the claim text.