Memory module and method having improved signal routing topology

A module, comprising:

• a plurality of first devices;
• a second device;
• and
• a symmetrical tree coupled to the second device, the symmetrical tree comprising a plurality of branches each of which comprises a pair of transmission lines coupled to each other and to another transmission line at one end and to either a transmission line of another branch or one of the first devices at another end, the transmission lines being arranged in a plurality of hierarchies with the transmission lines in the same hierarchy having substantially the same length.

A module, comprising:

• a plurality of first devices;
• a second device;
• and
• a symmetrical tree coupled to the second device, the symmetrical tree comprising at least one branch that comprises a pair of transmission lines coupled to each other and to another transmission line at one end and to either a transmission line of another branch or one of the first devices at another end, each of the transmission lines having a characteristic impedance, the transmission lines being arranged in a plurality of hierarchies with the transmission lines in the same hierarchy having substantially the same characteristic impedance.

A module, comprising:

• a plurality of first devices;
• a second device;
• and
• a symmetrical tree coupled to the second device, the symmetrical tree comprising a plurality of branches each of which comprises a pair of transmission lines coupled to each other and to another transmission line at one end and to either a transmission line of another branch or one of the first devices at another end, the transmission lines being arranged in a plurality of hierarchies with both of transmission lines in the same hierarchy being configured so that a time period during which a signal may propagate through each of the transmission lines is substantially the same for both transmission lines.