Optimal local supply voltage determination circuit
AssigneeInternational Business Machines Corporation
InventorsKerry Bernstein, David S. Wolpert
Life of this patent
Estimating the term…
Abstract
A test circuit that compares test results between two tests with different local supply voltages is provided. The output of each stage of the logic circuits is stored in a first register of each test circuit. Each test is performed with a critical test vector and a local supply voltage that decreases from test to test. The outputs of successive tests are compared in each test circuit. The tests are performed iteratively with successive reduction in the value of the local supply voltage until at least one stage of the logic circuits produces non-matching results between the first and second register. The voltage immediately before producing such non-matching results is the minimum operational voltage for the local voltage island.
Claims20
A semiconductor circuit comprising:
- a logic circuit providing a logic output;
- a first register receiving said logic output and generating a first register output;
- a second register receiving said first register output and generating a second register output;
- a comparator that compares said first register output and said second register output and generating a comparator output;
- and
- a multiplexer receiving said first register output, at least one test vector bit, and a test signal and generating a multiplexer output;
- wherein a supply voltage of said logic circuit is controlled by said comparator output as a circuit operation parameter which modulates a local supply voltage within said logic circuit.
A semiconductor circuit comprising:
- a first register generating a first register output;
- a second register receiving said first register output and generating a second register output;
- a first comparator that compares said first register output and said second register output and generating a first comparator output signal;
- a first multiplexer receiving said first register output, at least one first test vector bit, and a test signal and generating a first multiplexer output;
- a logic circuit receiving said first multiplexer output as a logic input and generating a logic output;
- a third register receiving said logic output and generating a third register output;
- a fourth register receiving said third register output and generating a fourth register output;
- a second comparator that compares said third register output and said fourth register output and generating a second comparator output;
- and
- a second multiplexer receiving said third register output, at least another test vector bit, and said test signal and generating a second multiplexer output, wherein said each of said at least one test vector bit is derived from a same test vector as one of said at least another test vector bit.
A method of determining a minimum operational voltage for a local voltage island in a semiconductor chip, said method comprising:
- providing a circuit comprising:
- a multiplexer receiving at least one test vector bit and generating a multiplexer output and having a test input node to which a test input signal is applied;
- a logic circuit receiving said multiplexer output as a logic input and generating a logic output;
- a first register receiving said logic output and generating a first register output;
- a second register receiving said first register output and generating a second register output;
- a comparator that compares said first register output and said second register output and generating a comparator output:
- and
- a local supply voltage generator circuit employing said comparator output to modulate a local supply voltage of said logic circuit;
- applying a test input signal to said test input node, wherein said multiplexer output is selected from said at least one test vector bit based on said test input signal;
- and
- adjusting said local supply voltage based on said local supply voltage generation circuit based on said comparator output.
Dependencies are inferred from the claim text.