Increasing Exposure Tool Alignment Signal Strength for a Ferroelectric Capacitor Layer
AssigneeTexas Instruments Incorporated
InventorsStephen Arlon Meisner, Scott R. Summerfelt
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AssigneeTexas Instruments Incorporated
InventorsStephen Arlon Meisner, Scott R. Summerfelt
Estimating the term…
An improved alignment structure for photolithographic pattern alignment is disclosed. A topographical alignment mark in an IC under a low reflectivity layer may be difficult to register. A reflective layer is formed on top of the low reflectivity layer so that the topography of the alignment mark is replicated in the reflective layer, enabling registration of the alignment mark using common photolithographic scanners and steppers. The reflective layer may be one or more layers, and may be metallic, dielectric or both. The reflective layer may be global over the entire IC or may be local to the alignment mark area. The reflective layer may be removed during subsequent processing, possibly with assist from an added etch stop layer, or may remain in the completed IC. The disclosed alignment mark structure is applicable to an IC with a stack of ferroelectric capacitor materials.
An integrated circuit, comprising:
A process of forming an integrated circuit, comprising the steps of:
Dependencies are inferred from the claim text.