Methods and apparatuses for generating a random sequence of commands for a semiconductor device
AssigneeQimonda AG
InventorsThomas Nirmaier, Wolfgang Spirkl
Life of this patent
Estimating the term…
Abstract
Methods and apparatuses for generating a random sequence of commands for a semiconductor device. The method generates random state transitions within a finite state machine model of the semiconductor device. A sequence of commands is determined which are associated to the generated random state transitions based on the finite state machine model of the semiconductor device.
Claims25
A method of generating a random sequence of commands for a semiconductor device, the method comprising:
- generating random state transitions within a finite state machine model of the semiconductor device;
- and
- determining a sequence of commands which are associated to the generated random state transitions based on the finite state machine model of the semiconductor device.
A method of generating a random pattern for simulation and/or test of a semiconductor device, the method comprising:
- generating random state transitions within a state machine model of the semiconductor device;
- determining a sequence of commands which are associated to the generated random state transitions based on the state machine model of the semiconductor device;
- determining minimum timing conditions for the commands of the command sequence;
- generating timings for the commands of the command sequence based on the determined minimum timing conditions;
- and
- generating a pin-specific pattern based on the command sequence and the timings for the commands of the command sequence by using a command truth table.
A computer program for generating a random sequence of commands for simulation and/or test of a semiconductor device, wherein the computer program causes the following actions when executed on a computer:
- generating random state transitions within a finite state machine model of the semiconductor device;
- and
- determining a sequence of commands which are associated to the generated random state transitions based on the finite state machine model of the semiconductor device.
An apparatus comprising:
- a sequence generator configured to generate random state transitions within a finite state machine model of a semiconductor device;
- and
- a timing generator configured to determine a sequence of commands which are associated to the generated random state transitions based on the finite state machine model of the semiconductor device.
An apparatus comprising:
- a random command sequence generator configured to generate random state transitions within a state machine model of a semiconductor device and determine a sequence of commands which are associated to the generated random state transitions;
- a timing generator configured to determine minimum timing conditions for the commands of the command sequence and generate timings for the commands based on the minimum timing conditions of the commands;
- and
- a pin-specific pattern generator configured to generate a pin-specific pattern based on the command sequence and the timings using a command truth table.
Dependencies are inferred from the claim text.