Semiconductor memory device having capability of stable initial operation
AssigneeHynix Semiconductor Inc.
InventorsBeom-Ju Shin, Sang-Sic Yoon
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device is capable of outputting a preset logic level through an EDC pin according to an operation mode during an initial operation, and providing a stable operation according to the specification of the semiconductor memory device just after the input of a data clock (WCK). The semiconductor memory device includes an output circuit configured to output a synchronous data in response to a data clock when the data clock is enabled, and output an asynchronous data when the data clock is disabled, and a data clock detection circuit configured to control outputting the asynchronous data by checking whether the data clock is in a stable state or not.
Claims20
A semiconductor memory device, comprising:
- an output circuit configured to output a synchronous data in response to a data clock when the data clock is enabled, and output an asynchronous data when the data clock is disabled;
- and
- a data clock detection circuit configured to control outputting the asynchronous data by checking whether the data clock is in a stable state.
A semiconductor memory device, comprising:
- a clock detection circuit configured to notify that a data clock is stabilized when a predetermined time elapses after the input of an external data clock;
- and
- an output circuit configured to output a logic high level signal until the data clock is stabilized after power is supplied, and perform one of an error detection mode and a strobe mode when the data clock is stabilized, in response to an output of the clock detection circuit.
A method for operating a semiconductor memory device, the method comprising:
- controlling outputting an asynchronous data by checking whether a data clock is in a stable state, and;
- outputting the asynchronous data when the data clock is disabled;
- and
- outputting a synchronous data in response to the data clock when the data clock is enabled.
Dependencies are inferred from the claim text.