Method of manufacturing semiconductor device
AssigneeRenesas Technology Corp.
InventorsYoshito Nakazawa, Hitoshi Matsuura
Life of this patent
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Abstract
A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper surface of the epitaxial layer becomes higher than that of a channel layer formed over the drain layer. Then, an insulating film is formed over each of the channel layer and the epitaxial layer and thereafter a part of the insulating film is removed to form side wall spacers over side walls of the epitaxial layer. Subsequently, with the side wall spacers as masks, a part of the channel layer and that of the drain layer are removed to form a trench for a trench gate.
Claims9
1-12. (canceled)
A semiconductor device having a trench gate type MOSFET, comprising:
- a semiconductor layer over a main surface of a semiconductor substrate;
- a plurality of first trenches formed in the semiconductor layer;
- an epitaxial layer formed within each of the first trenches such that an upper surface of the semiconductor layer is higher than an upper surface of the epitaxial layer;
- a second trench for a gate formed in a region of the semiconductor layer where the upper surface of the semiconductor layer is higher than the upper surface of the epitaxial layer;
- a gate insulating film formed within the second trench;
- and
- a gate electrode over the gate insulating film.
A semiconductor device having a trench gate type MOSFET, comprising:
- a drain layer of a first conductivity type formed over a main surface of a semiconductor substrate of a second conductivity type;
- a channel layer formed over the drain layer;
- a plurality of first trenches formed in the channel layer and in the drain layer;
- an epitaxial layer of the second conductivity type formed in each of the first trenches such that an upper surface of the channel layer is higher than an upper surface of the epitaxial layer;
- a second trench for a gate formed in the drain layer and in the channel layer where the upper surface of the channel layer is higher than the upper surface of the epitaxial layer;
- a gate insulating film formed within the second trench;
- a gate electrode formed over the gate insulating film;
- and
- a source region of the first conductivity type formed over the channel layer.
Dependencies are inferred from the claim text.