Method of forming lateral trench MOSFET with direct trench polysilicon contact
AssigneesAdvanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
InventorsDonald Ray Disney, Cho Chiu Ma
Life of this patent
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Abstract
A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
Claims9
A method of forming a lateral trench MOSFET comprising:
- forming a trench in a semiconductor substrate, the trench comprising an LTDMOS segment and a gate bus segment;
- lining the walls of the trench with a dielectric layer;
- introducing a first conductive material into the trench;
- implanting a dopant of a first conductivity type into the substrate to form a body region adjacent a sidewall of the LTDMOS segment of the trench;
- implanting a dopant of a second conductivity type into the substrate to form a drift region adjacent the body region and the sidewall of the LTDMOS segment of the trench;
- implanting a dopant of the second conductivity type into the substrate to form a source region adjacent a top surface of the substrate and the body region;
- implanting a dopant of the second conductivity type into the substrate to form a drain region adjacent the top surface of the substrate laterally spaced apart from the source region;
- forming a second dielectric layer over the top surface of the substrate;
- forming a contact hole in the second dielectric layer above the gate bus segment of the trench, the contact hole having substantially vertical walls which intersect the conductive material in the gate bus segment of the trench;
- filling the contact hole with a second conductive material to form a contact plug in the contact hole;
- and
- forming a gate metal layer over the second dielectric layer, the gate metal layer being in contact with the contact plug.
A method of forming a semiconductor device comprising:
- forming a first mask layer over the surface of a semiconductor substrate;
- forming a first opening in the first mask layer;
- etching the substrate through the first opening to form a first trench;
- lining the walls of the first trench with a first dielectric layer;
- introducing a first conductive material into the first trench;
- forming a second mask layer over the first mask layer;
- forming a second opening in the first and second mask layers;
- removing the second mask layer;
- introducing an etchant, the etchant etching the first conductive material through the first opening to form a recess in the first conductive material, the etchant etching the substrate through the second opening to form a second trench in the substrate;
- forming a second dielectric layer over the top surface of the substrate, the second dielectric layer filling the recess in the first conductive material and the second trench;
- and
- planarizing the second dielectric layer.
Dependencies are inferred from the claim text.