# US 2009/0215203 A1 · Monitoring of temperature variation across wafers during processing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2009/0215203 A1 - Document ID: US20090215203A1 - Status: Published application - Kind: A1 - Application number: 12/037,531 - Filed: 2008-02-26 - Published: 2009-08-27 - Earliest claimed: 2008-02-26 - Assignees: Texas Instruments Incorporated - Inventors: Deepak A. Ramppa; Rosa A. Orozco-Teran; Laura Matz - Web page: https://patentgrep.com/patent/US20090215203A1 ## CPC - H10P 74/20: characterised by the properties tested or measured, e.g. structural or electrical properties - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method of measuring temperature across wafers during semiconductor processing includes the step of providing a correlation between a peak wafer temperature during a processing step and a change in wafer surface charge or surface potential following the processing step. A first wafer to be characterized for its peak temperature spatial distribution during the processing step is processed through the processing step. The wafer surface charge or surface potential at a plurality of locations on the first wafer are measured following the processing step. A peak temperature spatial distribution for the first wafer is then determined based on the correlation and the wafer surface charge or surface potential measured in the measuring step. ## Claims ### Claim 1 A method of measuring temperature across wafers during semiconductor processing, comprising: providing a correlation between a peak wafer temperature during a processing step and change in wafer surface charge or surface potential following said processing step; processing a first wafer to be characterized for its peak temperature spatial distribution during said processing step through said processing step; measuring said wafer surface charge or surface potential at a plurality of locations on said first wafer following said processing step, and determining said peak temperature spatial distribution for said first wafer based on said correlation and said wafer surface charge or surface potential measured in said measuring step. ### Claim 2 (depends on 1) The method of claim 1, wherein said providing a correlation comprises processing a thermocouple comprising wafer having a plurality of thermocouples coupled thereto and a control wafer through said processing step, wherein said thermocouple comprising wafer and said control wafer both comprise a particular layer. ### Claim 3 (depends on 1) The method of claim 1, wherein said particular layer comprises a dielectric layer having a thickness between 20 nm and 300 nm. ### Claim 4 (depends on 3) The method of claim 3, wherein said dielectric layer comprises silicon oxide. ### Claim 5 (depends on 1) The method of claim 1, wherein said thermocouple comprising wafer includes a structure for storing temperature data from said thermocouples and a processor, said structure for storing coupled to said processor. ### Claim 6 (depends on 1) The method of claim 1, wherein said thermocouple comprising wafer and said control wafer are both processed together during said processing step. ### Claim 7 (depends on 1) The method of claim 1, wherein said processing step comprises a clean. ### Claim 8 (depends on 1) The method of claim 1, wherein said processing step comprises a wet etch. ### Claim 9 (depends on 1) The method of claim 1, wherein said processing step comprises a dry etch. ### Claim 10 (depends on 1) The method of claim 1, wherein said processing step comprises sputtering. ### Claim 11 (depends on 1) The method of claim 1, wherein said correlation comprises a quadratic relationship, wherein said peak wafer temperature is related to a square of said change in wafer surface potential. ### Claim 12 (depends on 1) The method of claim 1, wherein said peak temperature spatial distribution comprises at least 100 temperature data points on said first wafer. ### Claim 13 (depends on 1) The method of claim 1, wherein said measuring comprises a corona discharge for biasing a surface of said first wafer. ### Claim 14 A method of measuring temperature across wafers during semiconductor processing, comprising: providing a correlation between a peak wafer temperature during a processing step and a change in wafer surface charge or surface potential following said processing step, wherein said providing a correlation comprises processing a thermocouple comprising wafer having a plurality of thermocouples coupled thereto and a control wafer together through said processing step, wherein said thermocouple comprising wafer and said control wafer both comprise a particular layer stack; processing a first wafer to be characterized for its peak temperature spatial distribution during said processing step through said processing step; measuring said wafer surface charge or surface potential at a plurality of locations on said first wafer following said processing step, and determining said peak temperature spatial distribution for said first wafer based on said correlation and said wafer surface charge or surface potential measured in said measuring step. ### Claim 15 (depends on 14) The method of claim 14, wherein said thermocouple comprising wafer includes a structure for storing temperature data from said thermocouples and a processor, said structure for storing coupled to said processor. ### Claim 16 (depends on 14) The method of claim 14, wherein said particular layer stack comprises a dielectric layer having a thickness between 20 nm and 300 nm. ### Claim 17 (depends on 16) The method of claim 16, wherein said dielectric layer comprises silicon oxide. ### Claim 18 (depends on 14) The method of claim 14, wherein said processing step comprises a clean. ### Claim 19 (depends on 14) The method of claim 14, wherein said processing step comprises a wet etch or a dry etch. ### Claim 20 (depends on 14) The method of claim 14, wherein said processing step comprises sputtering.