Capacitive isolation circuitry

An integrated circuit having voltage isolation capabilities, comprising:

• a plurality of communications channels for transceiving data from the integrated circuit, each of the communications channel including capacitive isolation circuitry located in conductive layers of the integrated circuit for providing a high voltage isolation link, the capacitive isolation circuitry distributing a first portion of a high voltage isolation signal across a first group of capacitors on a first link and a second link in the capacitive isolation circuitry and distributing a second portion of the high voltage isolation signal across a second group of capacitors in the first link and the second link in the capacitive isolation circuitry;
• a differential receiver on each of the plurality of communications channels for receiving the data on the first link and the second link;
• a differential transmitter on each of the plurality of communications channels for transmitting the data on the first link at a first phase and for transmitting the data on the second link at a second phase, wherein the second phase is 180 degrees out of phase with the first phase;
• and
• a plurality of ground lines located between each pair of adjacent communications channels, wherein the ground lines prevent cross coupling between the adjacent communications channels.

An integrated circuit having voltage isolation capabilities, comprising:

• a plurality of communications channels for transceiving data from the integrated circuit, each of the communications channel including capacitive isolation circuitry located in conductive layers of the integrated circuit for providing a high voltage isolation link, the capacitive isolation circuitry distributing a first portion of a high voltage isolation signal across a first group of capacitors on a first link and a second link in the capacitive isolation circuitry and distributing a second portion of the high voltage isolation signal across a second group of capacitors in the first link and the second link in the capacitive isolation circuitry;
• a differential receiver on each of the plurality of communications channels for receiving the data on the first link and the second link;
• a differential transmitter on each of the plurality of communications channels for transmitting the data on the first link at a selected one of a first phase and a second phase and for transmitting the data on the second link at the selected one of the first phase and the second phase, wherein the second phase is 180 degrees out of phase with the first phase;
• a plurality of ground lines located between each pair of adjacent communications channels, wherein the ground lines limit cross coupling between the adjacent communications channels;
• wherein each of the differential transmitters controls the selection of the first phase and the second phase on each of the first link and the second link such that the first phase or the second phase is cross coupled onto a selected communications channel from adjacent communications channels;
• and
• wherein each of the first link and the second link further includes a bond wire for interconnecting the pair of capacitors in the first link and the second link, the bond wire connected to a plate of each capacitor without a use of a bonding pad.