Integrated photonic semiconductor devices and methods for making integrated photonic semiconductor devices

A photonic semiconductor device comprising:

• a substrate having a lower surface and an upper surface;
• one or more layers including:
• at least one buffer layer having a lower surface that is in contact with the upper surface of the substrate;
• one or more multi quantum well (MQW) and confinement heterostructure (SCH) layers, one layer of said one or more MQW and SCH layers having a lower surface that is in contact with an upper surface of said at least one buffer layer;
• one or more stop etch and spacer layers, one of said one or more stop etch and spacer layers having a lower surface that is in contact with an upper surface of said one or more MQW and SCH layers;
• a grating layer having a lower surface that is in contact with an upper surface of said one or more stop etch and spacer layers;
• a waveguide ridge structure formed on said grating layer, the waveguide ridge structure comprising a waveguide ridge and first and second channels extending along first and second sides of the waveguide ridge, respectively;
• a first mini-trench formed in said first channel in said grating layer and at least partially in said one or more stop etch and spacer layers, the first mini-trench extending in a direction substantially parallel to said waveguide ridge alongside said waveguide ridge;
• and
• a second mini-trench formed in said second channel in said grating layer and at least partially in said one or more stop etch and spacer layers, the second mini-trench extending in a direction substantially parallel to said waveguide ridge alongside said waveguide ridge, the first and second mini-trenches providing an isolation region of the semiconductor device with a relatively high resistance and a relatively low parasitic capacitance.

A method for fabricating a photonic semiconductor device, the method comprising:

• providing a substrate having a lower surface and an upper surface;
• forming one or more layers on the substrate, said one or more layers including:
• at least one buffer layer having a lower surface that is in contact with the upper surface of the substrate;
• one or more multi quantum well (MQW) and confinement heterostructure (SCH) layers, one layer of said one or more MQW and SCH layers having a lower surface that is in contact with an upper surface of said at least one buffer layer;
• at least one grating layer having a lower surface that is in contact with an upper surface of said one or more MQW and SCH layers, at least a portion of the grating layer having a periodically varying refractive index region therein;
• and
• one or more cladding and contact layers, one of said one or more cladding and contact layers having a lower surface that is in contact with an upper surface of said at least one grating layer;
• forming a waveguide ridge in at least said one or more cladding and contact layers;
• forming a first trench at least in said one or more cladding and contact layers and in said at least one grating layer, said first trench being located on a side of the waveguide ridge and extending in a direction substantially parallel to said waveguide ridge alongside said waveguide ridge, the first trench having at least a first width along a first portion thereof and a second width along a second portion thereof, the second width being greater than the first width;
• and
• forming a second trench at least in said one or more cladding and contact layers and in said at least one grating layer, said second trench being located on a side of the waveguide ridge opposite the side of the waveguide ridge on which the first trench is located, the second trench extending in a direction substantially parallel to said waveguide ridge alongside said waveguide ridge, the second trench having at least a first width along a first portion thereof and a second width along a second portion thereof, the second width along the second portion of the second trench being greater than the first width along the first portion of the second trench.

A method for performing a selective area growth (SAG) process when making a photonic semiconductor device that results in a substantially planar surface being formed at the completion of the SAG process, the method comprising:

• providing a substrate having a lower surface and an upper surface;
• forming at least a first layer structure on the substrate, the first layer structure having an upper surface and a lower surface, said first layer structure comprising:
• at least a first layer of a first material having an upper surface and a lower surface, the lower surface of the said layer of material corresponding to a lower surface of the first layer structure;
• and
• at least one second layer of a second material having an upper surface and a lower surface, the upper surface of said second layer corresponding to an upper surface of the first layer structure;
• forming a mask pattern on the upper surface of said second layer such that at least one portion of said second layer is unmasked by the mask pattern and such that at least one portion of the second layer is masked by the mask pattern;
• performing an etching process that etches away unmasked portions of the second layer to form at least one recess in the second layer;
• and
• performing a SAG process to form at least a second layer structure of the photonic semiconductor device, the second layer structure comprising at least one multi quantum well (MQW) layer and at least one confinement heterostructure (SCH) layer, the second layer structure having a lower surface that is in contact with the upper surface of said first layer, the upper surface of the second layer structure being substantially coplanar with the upper surface of the first layer structure.

A method for adhering a contact pad to a surface of a semiconductor device comprising:

• providing a substrate having an upper surface and a lower surface;
• forming at least one trench in the substrate, the trench having one or more sides;
• and
• forming a contact pad on the substrate such that a portion of the contact pad is disposed on the upper surface of the substrate and such that a portion of the contact pad is disposed within the trench and is in contact with at least one of the sides of the trench, the portion of the contact pad that is disposed within the trench in contact with at least one of the sides of the trench forming an anchor that helps adhere the contact pad to the substrate.