Logic embedded memory having registers commonly used by macros
AssigneeKabushiki Kaisha Toshiba
InventorRyo FUKUDA
Life of this patent
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Abstract
A semiconductor integrated circuit device includes a plurality of memory macros, macro-common register block, and memory macro operation setting circuits. The macro-common register block has macro-common registers which are provided outside the plurality of memory macros and supply memory macro operation specifying signals to the plurality of memory macros. The memory macro operation setting circuits are respectively provided in the plurality of memory macros and are each configured to set an operating state of the memory macro in response to the memory macro operation specifying signal supplied from the macro-common register.
Claims16
A semiconductor integrated circuit device comprising:
- a plurality of memory macros having memory cells which store data;
- a nonvolatile storage circuit which stores a plurality of data items for tuning operations of the plurality of memory macros;
- a macro-common register block provided outside the plurality of memory macros and having macro-common registers which sequentially distribute memory macro operation specifying signals for tuning operations of the plurality of memory macros, to the plurality of memory macros, the macro-common registers being connected in serial to the nonvolatile storage circuit to serially store, upon power on, the data items for tuning operations of the plurality of memory macros and stored in the nonvolatile storage circuit;
- and
- memory macro operation setting circuits which are respectively provided in the plurality of memory macros and configured to set operating states of the memory macros according to the memory macro operation specifying signals supplied from the macro-common registers.
Dependencies are inferred from the claim text.