Programming method for non-volatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsKi-tae PARK, Yeong-taek LEE
Life of this patent
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Abstract
Provided is a method of programming a non-volatile memory device. The method includes applying a first programming pulse to a corresponding wordline of the non-volatile memory device, applying a second programming pulse to the wordline, wherein a voltage of the second programming pulse is different from that of the first programming pulse, and applying voltages to each bitline connected to the wordline, the voltages applied to each of the bitlines are different from each other according to a plurality of bit values to be programmed to corresponding memory cells in response to the first programming pulse or the second programming pulse.
Claims22
A method of programming a multi-level cell non-volatile memory device, the method comprising:
- applying a first programming pulse to a wordline of the non-volatile memory device;
- applying a second programming pulse to the wordline, wherein a voltage level of the second programming pulse is different from that of the first programming pulse;
- and
- applying bitline voltages to respective bitlines associated with the wordline, wherein the bitline voltages vary in accordance with a plurality of data bit values to be programmed to a plurality of memory cells associated with the word line and bitlines and in response to either the first programming pulse or the second programming pulse.
A method of programming a non-volatile memory device, the method comprising:
- performing a programming operation during which at least one programming pulse that varies in relation to a plurality of 1st through Mth data bit values to be programmed to a plurality of memory cells connected to a wordline is applied to the wordline;
- and thereafter,
- performing a verifying operation, wherein execution timing of the verifying operation varies in relation to the plurality 1st through Mth data bit values.
A method of programming a non-volatile memory device, the method comprising:
- applying first through Nth, where is a natural integer greater than 1, programming pulses to a word line, wherein respective voltage levels for the first through Nth programming pulses are different;
- and
- applying bitline voltages to respective bitlines associated with the wordline, wherein the bitline voltages vary in accordance with a plurality of data bit values to be programmed to a plurality of memory cells associated with the word line and bitlines and in response to either the first programming pulse or the second programming pulse.
Dependencies are inferred from the claim text.