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US 2009/0213259 A1Published application
Correlation Double Sampling Circuit for Image Sensor
AssigneePixart Imaging Inc.
InventorsTsung-Yi Su, Han-Chi Liu
Life of this patent
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Abstract
A correlation double sampling (CDS) circuit for sampling a reset signal and a light-sensing signal outputted from a pixel column of an image sensor includes two sampling capacitors and four transistor switches. The operation of the CDS circuit needs not change polarities of the two sampling capacitors, such that MOS capacitors that have higher capacitance per unit area can be utilized for realizing the two sampling capacitors for reducing thermal noises induced when performing sampling. Additionally, fewer transistors are used in the CDS circuit, and thus charge injection noises caused by switching the transistor switches can also be reduced.
Claims16
A complementary metal-oxide semiconductor (CMOS) image sensor comprising:
- a pixel array comprising a plurality of pixel sensors arranged as a matrix, each of the plurality of pixel sensors utilized for sensing incident light and outputting a reset signal and a light-sensing signal in order;
- and
- a plurality of correlation double sampling (CDS) circuits, individually coupled to a column of the pixel array, for sampling the reset signal and the light-sensing signal outputted by the column, each of the plurality of CDS circuits comprising:
- a signal input terminal for receiving the reset signal and the light-sensing signal;
- a first sampling capacitor having a first terminal and a second terminal, the second terminal coupled to a reference voltage terminal;
- a second sampling capacitor having a first terminal and a second terminal, the second terminal coupled to the reference voltage terminal;
- a first switch, coupled between the signal input terminal and the first terminal of the first sampling capacitor, for providing electrical connection between the signal input terminal and the first sampling capacitor during a first phase to enable the first sampling capacitor to sample a voltage of the reset signal;
- a second switch, coupled between the signal input terminal and the first terminal of the second sampling capacitor, for providing electrical connection between the signal input terminal and the second sampling capacitor during a second phase to enable the second sampling capacitor to sample a voltage of the light-sensing signal;
- a third switch, coupled to the first terminal of the first sampling capacitor, for providing electrical connection between the first sampling capacitor and a first signal output terminal during a third phase to enable the first sampling capacitor to output the sampled voltage to the first signal output terminal;
- and
- a fourth switch, coupled to the first terminal of the second sampling capacitor, for providing electrical connection between the second sampling capacitor and a second signal output terminal during the third phase to enable the second sampling capacitor to output the sampled voltage to the second signal output terminal;
- wherein the first signal output terminal and the second signal output terminal are differential input terminals of a rear-stage buffer amplifier.
9 more elements
A correlation double sampling (CDS) circuit of an image sensor for sampling a reset signal and a light-sensing signal outputted from a pixel column of the image sensor, the CDS circuit comprising:
- a signal input terminal for receiving the reset signal and the light-sensing signal;
- a first sampling capacitor having a first terminal and a second terminal, the second terminal coupled to a reference voltage terminal;
- a second sampling capacitor having a first terminal and a second terminal, the second terminal coupled to the reference voltage terminal;
- a first switch, coupled between the signal input terminal and the first terminal of the first sampling capacitor, for providing electrical connection between the signal input terminal and the first sampling capacitor during a first phase to enable the first sampling capacitor to sample a voltage of the reset signal;
- a second switch, coupled between the signal input terminal and the first terminal of the second sampling capacitor, for providing electrical connection between the signal input terminal and the second sampling capacitor during a second phase to enable the second sampling capacitor to sample a voltage of the light-sensing signal;
- a third switch, coupled to the first terminal of the first sampling capacitor, for providing electrical connection between the first sampling capacitor and a first signal output terminal during a third phase to enable the first sampling capacitor to output the sampled voltage to the first signal output terminal;
- and
- a fourth switch, coupled to the first terminal of the second sampling capacitor, for providing electrical connection between the second sampling capacitor and a second signal output terminal during the third phase to enable the second sampling capacitor to output the sampled voltage to the second signal output terminal;
- wherein the first signal output terminal and the second signal output terminal are differential input terminals of a rear-stage buffer amplifier.
6 more elements
Dependencies are inferred from the claim text.