Op-amp circuit and op-amp circuit driving method

Abstract

The present invention is to provide a CMOS op-amp circuit, an op-amp circuit and an op-amp circuit control method that can increase operating speed when the op-amp circuit stabilizes to a steady state after release of a power down state. During power down, a voltage is applied to a node N1 by SW1, and the voltage is outputted from an output end OUT1. Accordingly, an electric potential difference arises between electrodes of a phase compensation capacitor C1, and the electric charge can be accumulated in the phase compensation capacitor C1. When the op-amp circuit switches to a steady state, the electric charge that had been accumulated is discharged, and a gate of an N-channel MOS transistor TN3 switches ON. Accordingly, the output value of an output end OUT2 is instantaneously reduced and becomes stable.

Dependencies are inferred from the claim text.