Semiconductor device arrangement and method
AssigneeInfineon Technologies AG
InventorGerald Deboy
Life of this patent
Estimating the term…
Abstract
A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor.
Claims21
A semiconductor device comprising:
- at least one power transistor;
- and
- at least one gate resistor located between a gate of the power transistor and a connecting point in a drive circuit of the power transistor,
- wherein a switchable element is additionally provided between the connecting point and a source of the power transistor.
A semiconductor device arrangement comprising:
- a power transistor having a gate;
- a connecting point in a drive circuit of the power transistor;
- a gate resistor of the power transistor located between the connecting point and the gate;
- and
- wherein a switchable element is located between the connecting point and a source of the power transistor and is connected to the gate such that the parasitic inductances between the connecting point and the source are bridged in the turn-off phase of the power transistor at steep switching edges.
A semiconductor device arrangement comprising:
- a connecting point of a power transistor;
- a gate of the power transistor;
- a gate resistor of the power transistor located between the connecting point and the gate;
- and
- a drive circuit, wherein a switchable element in the drive circuit is monolithically integrated into the power transistor and comprises a gate which is externally accessible and which can be controlled by a complementary driver pulse such that the parasitic inductances between the connecting point and a source of the power transistor are bridged by means of the switchable element at a steep switching edge.
A semiconductor device arrangement comprising:
- a connecting point of a power transistor;
- a gate of the power transistor;
- a gate resistor of the power transistor located between the connecting point and the gate;
- and
- a drive circuit, wherein a switchable element in the drive circuit includes an operational amplifier, having first and second inputs electrically connected to the connecting point and to the gate of the power transistor respectively, and the output of which is electrically connected to the gate of the switchable element, so that parasitic inductances between the connecting point and a source of the power transistor are bridged by means of the switchable element at a steep switching edge.
A method for the production of a semiconductor device arrangement with a switchable element in the drive circuit, comprising:
- providing a power transistor with parasitic inductances between a connecting point and a source and with a gate resistor between the connecting point and the gate;
- producing a switchable element which, at a steep switching edge, bridges the inductances between the connecting point and the source in a turn-off phase of the power transistor.
Dependencies are inferred from the claim text.