Isolation circuit
AssigneeMicron Technology, Inc.
InventorsHani S. Attalla, Daniel P. Cram
Life of this patent
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Abstract
The present disclosure includes various method, device, and system embodiments for isolation circuits. One such isolation circuit embodiment includes: a first transistor configured for connection to a supply voltage via a first terminal; a register connected to the first transistor; a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register; and wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register.
Claims25
An isolation circuit, comprising:
- a first transistor configured for connection to a supply voltage via a first terminal;
- a register connected to the first transistor;
- a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register;
- and
- wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register.
An isolation circuit, comprising:
- a resistor connected in parallel with a first transistor to a first supply voltage input terminal;
- a register having an output connected to a gate of the first transistor, the register connected to the first supply voltage input terminal;
- and
- wherein the register is operable to control a state of the first transistor.
An isolation circuit, comprising:
- a resistor connected in parallel with a first transistor to a first supply voltage input terminal;
- a register having an output connected to a gate of the first transistor, the register connected to the first supply voltage input terminal;
- a second transistor connected between the first supply voltage input terminal and the register;
- and
- wherein the register is operable to control a state of the first transistor.
Dependencies are inferred from the claim text.