Device, system and method for testing and analyzing integrated circuits
AssigneeNXP B.V.
InventorAnthony S. J. Gummer
Life of this patent
Estimating the term…
Loading patent…
AssigneeNXP B.V.
InventorAnthony S. J. Gummer
Estimating the term…
This invention relates to a semiconductor device for testing and analyzing integrated circuits (1) on a first side and a second side. The semiconductor device (1) having a first surface (A1) and a second surface (A2) both sides having a set of contacts (P3a, P3b, P3a′, P3b′). The sets of contacts on are symmetrically located on positions relative to a first fictitious plane of symmetry (S1) and a second fictitious plane of symmetry (S2). The semiconductor device (1) has at least a first position of use and a second position of use, whereby the second position of use is obtained by rotating the semiconductor device (1) in the first position of use 180° around a fictitious axis (M). This axis (M) is defined by the crossing of the first fictitious plane of symmetry (S1) and the second fictitious plane of symmetry (S2). The semiconductor device thus obtained provides a flexible and generic solution for testing and analyzing integrated circuits on both sides.
A device for testing and analyzing integrated circuits having a first side and a second side with a first imaginary plane of symmetry perpendicular to the first side of the device, the device further comprising a set of signal conductors and on both sides of the device a set of signal contacts, the set of signal contacts on the second side of the device being located at mirrored positions relative to the set of signal contacts on the first side of the device and the sets of signal contacts on both sides of the device being symmetrically positioned relative to the first imaginary plane of symmetry.
Dependencies are inferred from the claim text.