Integrated circuit device comprising conductive vias and method of making the same

An integrated circuit device, comprising:

• a semiconductor substrate;
• and
• a circuit component formed on the semiconductor substrate,
• wherein the semiconductor substrate comprises a semiconductor portion defining an upper surface and a lower surface and at least one insulating substrate region defining a first surface and a second surface and being formed of a cohesive insulating material, wherein the at least one insulating substrate region is at least partially disposed between the upper surface and the lower surface and includes at least two conductive vias extending at least between the first surface and the second surface of the insulating substrate region, and
• wherein the circuit component is electrically coupled to at least one of the conductive vias.

An integrated circuit device, comprising:

• a stack of semiconductor substrates;
• and
• circuit components formed on the semiconductor substrates,
• wherein each semiconductor substrate comprises a semiconductor portion defining an upper surface and a lower surface and at least one insulating substrate region defining a first surface and a second surface and being formed of a cohesive insulating material, wherein the at least one insulating substrate region is at least partially disposed between the upper surface and the lower surface and includes at least two conductive vias extending at least between the first surface and the second surface of the insulating substrate region, and
• wherein at least one conductive via of each semiconductor substrate is electrically coupled to at least one conductive via of another semiconductor substrate of the stack of semiconductor substrates.

A method of making an integrated circuit device, comprising:

• providing a semiconductor substrate having a first surface and a second surface;
• forming at least two conductive vias and an insulating substrate region, the conductive vias extending from the first surface to a first depth in the substrate and the insulating substrate region extending from the first surface to a second depth in the substrate, wherein the conductive vias at least partially penetrate the insulating substrate region;
• and
• thinning the semiconductor substrate at the second surface to expose the conductive vias and the insulating substrate region.