Structure and process for metallization in high aspect ratio features

A semiconductor structure comprising:

• at least one semiconductor device located on a surface of a semiconductor substrate, said at least one semiconductor device including at least a material stack having an upper surface that is comprised of a metal semiconductor alloy;
• a dielectric material located on said surface of said semiconductor substrate, said dielectric material including a contact opening that extends to the upper surface of said material stack, said contact opening having an aspect ratio of greater than 3:1;
• a noble metal-containing material present within a lower region of said contact opening, said noble metal-containing material is in direct contact with said upper surface of said material stack;
• and
• a conductive metal-containing material located within an upper portion of said contact opening and separated from said noble metal-containing material by a bottom wall portion of at least a U-shaped diffusion barrier.

A method of fabricating a semiconductor structure comprising:

• providing a structure including at least one semiconductor device located on a surface of a semiconductor substrate, said at least one semiconductor device including at least a material stack having an upper surface that is comprised of a metal semiconductor alloy;
• forming a dielectric material on said surface of said semiconductor substrate, said dielectric material including a contact opening that extends to the upper surface of said material stack, said contact opening having an aspect ratio of greater than 3:1;
• and
• filling said contact opening with at least a noble metal-containing material, said noble metal-containing material is present at least within a lower region of said contact opening and is in direct contact with said upper surface of said material stack.

A method of forming a semiconductor structure comprising:

• providing a structure including at least one semiconductor device located on a surface of a semiconductor substrate, said at least one semiconductor device including at least a material stack having an upper surface that is comprised of a metal semiconductor alloy;
• forming a dielectric material on said surface of said semiconductor substrate, said dielectric material including a contact opening that extends to the upper surface of said material stack, said contact opening having an aspect ratio of greater than 3:1;
• partially filling said contact opening with at least a noble metal-containing material, said noble metal-containing material is present within a lower region of said contact opening and is in direct contact with said upper surface of said material stack;
• and
• forming at least a U-shaped diffusion barrier and a conductive metal-containing material within said contact opening, said conductive metal-containing material is located within an upper portion of said contact opening and is separated from said noble metal-containing material by a bottom wall portion of at least said U-shaped diffusion barrier.