Integrated circuit package system with external interconnects within a die platform
AssigneeSTATS ChipPAC, Ltd.
InventorsLionel Chien Tay, Seng Guan Chow
Life of this patent
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Abstract
The present invention provides an integrated circuit package system comprising: attaching a die platform to an integrated circuit die; mounting the integrated circuit die over an external interconnect with a bottom side of the external interconnect partially within the die platform; connecting the integrated circuit die and the external interconnect; and forming an encapsulation over the integrated circuit die with the external interconnect partially exposed.
Claims20
An integrated circuit package system comprising:
- attaching a die platform to an integrated circuit die;
- mounting the integrated circuit die over an external interconnect with a bottom side of the external interconnect partially within the die platform;
- connecting the integrated circuit die and the external interconnect;
- and
- forming an encapsulation over the integrated circuit die with the external interconnect partially exposed.
An integrated circuit package system comprising:
- attaching a die platform comprising a first non-conductive material to an integrated circuit die;
- mounting the integrated circuit die over an external interconnect having a body and a tip, with a bottom side of the tip partially within the die platform;
- connecting an internal interconnect between the integrated circuit die and the external interconnect;
- and
- forming an encapsulation over the integrated circuit die with the external interconnect partially exposed.
An integrated circuit package system comprising:
- a die platform attached with an integrated circuit die;
- an external interconnect mounted to the integrated circuit die, with a bottom side of the external interconnect partially within the die platform;
- an internal interconnect connected between the integrated circuit die and the external interconnect;
- and
- an encapsulation formed over the integrated circuit die partially exposing the external interconnect.
Dependencies are inferred from the claim text.