Electron blocking layers for electronic devices
AssigneeNanosys, Inc.
InventorJian Chen
Life of this patent
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Abstract
Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide, hafnium oxide, and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multi state (e.g., two, three or four bit) operation.
Claims26
A gate stack of a memory device, the gate stack comprising:
- a charge storage layer on a tunneling dielectric layer;
- a first dielectric layer comprising a high-k dielectric material on the charge storage layer;
- a second dielectric layer comprising SiO2 on the first dielectric layer;
- a third dielectric layer comprising SiN on the second dielectric layer;
- a fourth dielectric layer comprising SiO2 on the third dielectric layer, and
- a fifth dielectric layer comprising a high-k dielectric material on the fourth dielectric layer.
A gate stack of a memory device, the gate stack comprising:
- a charge storage layer comprising localized charge traps on a tunneling dielectric layer;
- a first dielectric layer comprising SiO2 on the charge storage layer;
- a second dielectric layer comprising SiN on the first dielectric layer;
- a third dielectric layer comprising SiO2 on the second dielectric layer, and
- a fourth dielectric layer comprising a high-k dielectric material on the third dielectric layer.
A gate stack of a memory device, the gate stack comprising:
- a charge storage layer comprising nanocrystals on a tunneling dielectric layer;
- a first charge blocking layer on the charge storage layer, the first charge blocking layer comprising hafnium;
- a control dielectric layer including a first oxide layer on the first charge blocking layer;
- a nitride layer on the first oxide layer;
- and a second oxide layer on the nitride layer, and
- a second charge blocking layer on the control dielectric layer, the second charge blocking layer comprising hafnium.
Dependencies are inferred from the claim text.