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US 2009/0212286 A1Published application
Method for making amorphous polycrystalline silicon thin-film circuits
AssigneeCommissariat a l'Energie Atomique
InventorWalid Benzarti
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AssigneeCommissariat a l'Energie Atomique
InventorWalid Benzarti
Estimating the term…
The invention relates to the fabrication of thin-film transistors made of amorphous silicon and of polycrystalline silicon on one and the same substrate. A polycrystalline silicon island (12) is formed, an insulating layer (14) and a first conducting layer (16) are deposited and these two layers are etched to the same pattern so as to simultaneously define a first insulated gate on top of the island and a second gate away from the island. The polycrystalline silicon is doped in order to form the source and the drain of a polycrystalline silicon first transistor (gate above the channel). An insulating layer (18) forming the gate insulator of an amorphous silicon transistor (gate beneath the channel) is deposited. The fabrication of the amorphous silicon transistor then continues with the deposition and etching of undoped amorphous silicon (20) and doped silicon (22), etching of the insulating layer (18) and deposition and etching of interconnect metal (28). The invention is applicable to LCD, LED and OLED.
A process for fabricating thin-film transistors made of amorphous silicon and polycrystalline silicon on one and the same substrate, comprising the steps of
A thin-film circuit comprising, on one and the same substrate, at least two thin-film transistors, one of which is a polycrystalline silicon transistor with a gate (Gp) above the channel and the other is an amorphous silicon transistor with a gate (Ga) beneath the channel, the gates of the two transistors being formed by two portions of one and the same conducting layer, one portion being deposited on top of a polycrystalline silicon island, from which it is separated by a first insulating layer portion, and the other portion being deposited on top of the substrate, from which it is separated by a second portion of the same insulating layer, wherein the circuit includes rows and columns of display pixels, with at least one amorphous silicon transistor and at least one polycrystalline silicon transistor in each pixel, the amorphous silicon transistor having its gate connected to a row select conductor, its drain connected to a column conductor, which applies a potential corresponding to the data to be displayed, and its source connected to the gate of the second transistor, the polycrystalline silicon transistor having its drain raised to a supply potential, its source connected to a light-emitting diode which is also connected to ground, and a storage capacitor being connected between the source of the amorphous silicon transistor and ground, the storage capacitor being produced by the conducting layer that forms the gates of the two transistors, by the insulating layer that forms the gate insulator of the amorphous silicon transistor, and by a second conducting layer that also forms the source and drain contacts of the two transistors.
Dependencies are inferred from the claim text.