5T high density NVDRAM cell

A method of operating a memory circuit, comprising:

• causing a high voltage region providing storage of a nonvolatile bit and a low voltage region providing at least partial storage of a volatile bit to become un-isolated from one another so that the value of the volatile bit becomes represented on a bit line;
• performing an operation involving the nonvolatile bit that affects the stored value of the volatile bit;
• refreshing the stored value of the volatile bit;
• and
• restoring the isolation between the high and low voltage regions.

A method of operating a memory circuit to perform a RECALL operation, comprising:

• causing a high voltage region providing storage of a nonvolatile bit and a low voltage region providing storage of a volatile bit to become un-isolated from one another;
• driving current from the high voltage region through the low voltage region and to a bit line when the stored nonvolatile bit is a one;
• storing the value of the bit line to the volatile bit;
• and
• restoring the isolation between the high and low voltage regions.

A device comprising:

• a processor in communication with a memory system, the memory system comprising memory cells, one or more of the memory cells comprising
• a high voltage region providing storage of a nonvolatile bit;
• a low voltage region providing at least partial storage of a volatile bit;
• and
• the high and low voltage regions isolated from one another and formed by a plurality of transistors in series between a current source and a bit line.