Read and volatile NV standby disturb
AssigneeSimtek
InventorsAndreas Scade, Stefan Guenther, Jeong-Mo Hwang
Life of this patent
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Abstract
A method of operating a nonvolatile memory circuit having a plurality of transistors arranged in series between a voltage/current source node and recall sink node includes asserting a gate bias on an isolation transistor between the source node and a charge storage transistor during nonvolatile STANDBY.
Claims11
A method of operating a nonvolatile memory circuit having a plurality of transistors arranged in series between a voltage-current source node and a recall sink node, the memory circuit having at least one charge storage transistor for storage of a charge representing a nonvolatile memory bit comprising:
- asserting a gate bias on an isolation transistor between the voltage-current source node and the charge storage transistor during nonvolatile STANDBY.
A method of operating a nonvolatile memory circuit comprising:
- pulsing the gate of a charge storage transistor after performing a nonvolatile operation.
A memory circuit comprising:
- a charge storage transistor adapted to have a substantial sub-threshold voltage leakage current.
Dependencies are inferred from the claim text.