Low-Latency Multichannel Video Port Aggregator
AssigneeTexas Instruments Incorporated
InventorTodd C. Hiers
Life of this patent
Estimating the term…
Abstract
A video port aggregator receives plural asynchronous video data streams. Corresponding input buffers generate video data and a status signal. A memory controller writes the video data in corresponding locations within an external memory. A channel triggers the memory controller to read data out of the external memory for transmission to a single video output port when said corresponding status signal indicates receipt of a predetermined portion of data. This read out of the external memory being faster than the writing. The channel sequencer triggers the memory controller to read data out of the external memory video data of a highest priority asynchronous video data stream having a received next portion of data.
Claims10
A video port aggregator comprising:
- a plurality of inputs for receiving asynchronous video data streams;
- a plurality of input buffers, each input buffer corresponding to one of said inputs, each input buffer generating video data and a status signal corresponding to said asynchronous video data stream;
- a memory controller connected to said plurality of input buffers for writing video data corresponding to said asynchronous video data streams in corresponding locations within an external memory;
- a channel sequencer connected to said plurality of input buffers and said memory controller, said channel sequencer triggering said memory controller to read data out of the external memory for transmission to a single video output port when said corresponding status signal indicates receipt of a predetermined portion of data, said read of data out of the external memory occurring at a faster rate than the writing of video data corresponding to on asynchronous video data stream.
Dependencies are inferred from the claim text.