Viterbi decoding apparatus and method
AssigneeElectronics and Telecommunications Research Institute
InventorsSung Woo CHOI, Kyu-Min Kang, Sang Sung Choi, Kwang Roh Park
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Abstract
A Viterbi decoding apparatus receives a plurality of block data in time order, and transmits a block data group including the plurality of block data. Then, the Viterbi decoding apparatus applies a Viterbi decoding algorithm to the block data group and outputs some block data of the block data group. In this way, it is possible to provide a Viterbi decoding apparatus that can operate at a high speed and improve a data transmission rate.
Claims13
A Viterbi decoding method comprising:
- receiving a plurality of block data in time order;
- transmitting a first block data group including the plurality of block data;
- applying a Viterbi decoding algorithm to the first block data group and outputting some block data of the first block data group;
- receiving a plurality of additional block data connected with the plurality of block data in time order;
- transmitting a second block data group including the plurality of additional block data and some block data of the first block data group;
- and
- applying the Viterbi decoding algorithm to the second block data group and outputting some block data of the second block data group.
A Viterbi decoding apparatus that receives data from a depuncturer including two memory buffers and outputting the data from the depuncturer using output clocks which is equal to or higher than input clocks, and performs decoding, the apparatus comprising:
- a distributor that receives a plurality of bits from the depuncturer, and distributes the received plurality of bits to each block data unit;
- a plurality of memory banks that receive block data corresponding to some of the plurality of bits from the distributor in a predetermined order, and store the received block data;
- a plurality of switches that are connected to some of the plurality of memory banks, and output the block data stored in one of the connected memory banks;
- and
- a plurality of decoders that are connected to some of the plurality of switches, receive a plurality of block data from the connected switches, process the plurality of block data according to a Viterbi decoding algorithm, and output some of the plurality of block data.
Dependencies are inferred from the claim text.