Forward error correction of an error acknowledgement command protocol

A method comprising:

• sending one or more commands from a host to a memory device via a command interconnect, wherein at least some of the one or more commands are covered by one or more parity bits;
• monitoring an input for a command parity ERROR signal from the memory device;
• receiving the command parity ERROR signal from the memory device, if the memory device detects a parity error;
• encoding an acknowledge with an error correction code, wherein the acknowledge is one or more bits to acknowledge the command parity ERROR signal;
• and
• sending the acknowledge to the memory device.

A system comprising:

• a first integrated circuit to receive one or more commands from a second integrated circuit;
• and
• the second integrated circuit coupled with the first integrated circuit via an N bit wide command interconnect, the second integrated circuit including,
• core logic;
• an input/output (IO) circuit coupled to the core logic, the IO circuit to provide the one or more commands to the first integrated circuit over the N bit wide command interconnect;
• parity logic to provide one or more parity bits to cover the commands provided on the N bit wide command interconnect, wherein the first integrated circuit is to provide a command parity ERROR signal if it detects a parity error;
• and
• logic to encode an acknowledge with an error correction code and provide the acknowledge to the memory device, responsive to receiving the command parity ERROR signal, wherein the acknowledge is one or more bits to acknowledge the command parity ERROR signal.