Method for producing parity check matrix for low complexity and high speed decoding, and apparatus and method for coding low density parity check code using the same
AssigneeElectronics and Telecommunications Research Institute
InventorsJong-Ee OH, Chanho YOON, Minho CHEONG, Sok-Kyu LEE
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Abstract
Provided are a method for producing a parity check matrix for low complexity and high speed decoding, and an apparatus and method for coding a Low Density Parity Check (LDPC) code using the same. The method includes: calculating a cyclic shift value of a subblock to a matrix; and when the calculated cyclic shift values of the subblock are arrayed in the matrix, producing a parity check matrix by arraying the cyclic shift values of the subblock except ‘0 matrix’ without duplication to any one column.
Claims15
A method for producing a parity check matrix, comprising:
- calculating a cyclic shift value of a subblock with respect to a matrix;
- and
- when the calculated cyclic shift values of the subblock are arrayed in the matrix, producing a parity check matrix by arraying the cyclic shift values of the subblock except ‘0 matrix’ without duplication to any one column.
An apparatus for coding a Low Density Parity Check (LDPC) code for low complexity and high-speed decoding, comprising:
- a bit input means for receiving an input bit;
- an information vector producing means for producing an information vector by multiplying the received input bit by an information block of a parity check matrix for high-speed decoding;
- a parity bit producing means for producing a parity bit by separating the produced information vector and a linear equation on a parity block of the parity check matrix as an independent linear equation;
- and
- a bit output means for outputting a code word by combining the received input bit and the produced parity bit.
A method for coding Low Density Parity Check (LDPC) code for low complexity and high-speed decoding, comprising:
- receiving an input bit;
- producing an information vector by multiplying the received input bit by an information block of a parity check matrix for high-speed decoding;
- producing a parity bit by separating the produced information vector and a linear equation on a parity block of the parity check matrix as an independent linear equation;
- and
- outputting a code word by combining the received input bit and the produced parity bit.
Dependencies are inferred from the claim text.