Adapting Word Line Pulse Widths in Memory Systems

A method of adjusting a wordline (WL) pulse width in a memory system including a memory operating according to a WL pulse, the method comprising:

• performing a self-test on the memory system to test the internal functionality of the memory under the current WL pulse width;
• and
• adjusting the WL pulse width of the memory based on the results of the self-test using on-chip adaptive WL control circuitry.

An apparatus for adjusting a wordline (WL) pulse width in a memory system including a memory operating according to a WL pulse, the apparatus comprising:

• means for performing a self-test on the memory system to test the internal functionality of the memory under the current WL pulse width;
• and
• on-chip means for adjusting the WL pulse width of the memory based on the results of the self-test.

A computer readable medium including sets of instructions executable by a processor to adjust a wordline (WL) pulse width in a memory system including a memory operating according to a WL pulse, the computer readable medium comprising:

• a first set of instructions to perform a self-test on the memory system to test the internal functionality of the memory under the current WL pulse width;
• and
• a second set of instructions to adjust the WL pulse width of the memory based on the results of the self-test.