Electronic equipment and control method
AssigneesKabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
InventorKazuo Sasama
Life of this patent
Estimating the term…
Abstract
Plural CPUs are provided, and when a first CPU of the plural CPUs is a master, the other CPU operates as a slave. Also, plural memories are provided including a memory that operates and is used for first processing when the master CPU operates and a memory that operates and is used for second processing when the slave CPU operates. Every time an OS (Operating System) starts, the CPU to serve as a master is sequentially switched, then the remaining CPU is caused to serve as a slave, and the memories used for the first processing and the second processing are sequentially switched.
Claims20
An electronic equipment comprising:
- plural CPUs, wherein when a first CPU of the plural CPUs is a master, the other CPU is a slave;
- plural memories provided corresponding to the plural CPUs, the plural memories including a memory that operates and is used for first processing when the master CPU operates, and a memory that operates and is used for second processing when the slave CPU operates;
- and
- a controller that sequentially switches the CPU to serve as a master of the plural CPUs, then causes the remaining CPU to serve as a slave and sequentially switches the memories used for the first processing and the second processing, every time an OS (Operating System) starts.
An image forming apparatus having a RIP (Raster Image Processor) function, comprising:
- plural CPUs, wherein when a first CPU of the plural CPUs is a master, the other CPU is a slave;
- plural memories provided corresponding to the plural CPUs, the plural memories including a memory that operates and is used for first processing other than processing of the RIP when the master CPU operates, and a memory that operates and is used for processing of the RIP when the slave CPU operates;
- and
- a controller that sequentially switches the CPU to serve as a master of the plural CPUs, then causes the remaining CPU to serve as a slave and sequentially switches the memories used for the first processing and the RIP processing, every time an OS (Operating System) starts.
A control method for an electronic equipment comprising:
- having plural CPUs, and when a first CPU of the plural CPUs is a master, causing the other CPU to operate as a slave;
- having plural memories corresponding to the plural CPUs, and executing first processing by using a memory corresponding to the master CPU when the master CPU operates;
- executing second processing by using a memory corresponding to the slave CPU when the slave CPU operates;
- and
- sequentially switching the CPU to serve as a master of the plural CPUs, then causing the remaining CPU to serve as a slave and sequentially switching the memories used for the first processing and the second processing, every time an OS (Operating System) starts.
Dependencies are inferred from the claim text.