Memory module with reduced access granularity
AssigneeRambus Inc.
InventorsCraig E. Hampel, Frederick A. Ware
Life of this patent
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Abstract
A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.
Claims15
A memory apparatus, comprising:
- a first memory array;
- a second memory array;
- a command bus interface;
- a data bus interface having a width with a first portion coupled to the first array and a second portion coupled to the second array;
- command bus interface logic including a mode register, where
- in a first mode, a memory access command is interpreted as simultaneously directed to both of the first memory array and the second memory array to process a memory word sized to correspond to the width, and
- in a second mode, the memory access command is interpreted as directed to exactly one of the first memory array or the second memory array at a given instant in time.
Dependencies are inferred from the claim text.