An invalidate method for maintaining cache coherency on a network on chip (‘NOC’), the NOC comprising integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers, the method comprising:
- receiving, through a port on a router of the network, an invalidate command, the invalidate command including an identification of a cache line, the invalidate command representing an instruction to invalidate the cache line, including sending the invalidate command to an IP block served by the router;
- if the port is a vertical port, sending the invalidate command horizontally and vertically to neighboring routers;
- and
- if the port is a horizontal port, sending the invalidate command only horizontally to neighboring routers.