Efficient processing of groups of host access requests that may include zero length requests

A device configured for connection to a host comprising a host memory, the device comprising:

• a device processor configured to execute device firmware to issue a plurality of internal host memory access requests, the plurality of internal host memory access requests including at least one zero length request and at least one non-zero length request;
• and
• a data transfer block connected to the device processor and including electronic circuitry configured to
• process the at least one non-zero length internal host memory access request by sending one or more external host memory access requests to the host,
• process the at least one zero length internal host memory access request internally without sending any requests to the host,
• determine when each of the various internal host memory access requests have been processed, and
• for each processed request, send an associated notification of completion to the device processor,
• wherein all notifications of completion are sent by the data transfer block to the device processor in the order in which their associated internal host memory access requests were issued by the device processor and the host is not guaranteed to process external host memory access requests in the order of issuance.

A method for processing memory access communications at a device connected to a host comprising:

• issuing a plurality of internal host memory access requests by a device processor, the plurality of internal host memory access requests including at least one zero length request and at least one non-zero length request;
• and
• processing the at least one non-zero length internal host memory access request by a data transfer block by sending one or more external host memory access requests to the host;
• processing the at least one zero length internal host memory access request by the data transfer block internally without sending any requests to the host;
• determining by the data transfer block when each of the various internal host memory access requests have been processed;
• and
• for each processed request, sending an associated notification of completion to the device processor by the data transfer block,
• wherein all notifications of completion are sent by the data transfer block to the device processor in the order in which their associated internal host memory access requests were issued by the device processor and the host is not guaranteed to process external host memory access requests in the order of issuance.