Display system with frame reuse using divided multi-connector element differential bus connector

A system comprising:

• an electronic device comprising:
• a housing containing at least:
• an A/C input or DC power input;
• at least one circuit substrate comprising graphics processing circuitry operatively coupled to receive power based on the A/C input or DC power input;
• a first divided multi-connector element differential bus connector, operatively coupled to the electronic circuitry, comprised of a single housing, adapted to mechanically connect with the circuit substrate having disposed therein:
• a divided electrical contact configuration comprised of a first group of electrical contacts divided from an adjacent second group of contacts, the first group of electrical contacts comprising:
• a row of lower contacts and upper contacts;
• and
• the second group of electrical contacts having an identical and mirrored configuration as the first group of contacts comprising:
• an identical and mirrored corresponding row of lower contacts and upper contacts;
• and a local frame buffer operatively coupled to the graphics and/or video processing circuitry,
• wherein the graphics processing circuitry is operative to generate and store display frames in the local frame buffer for another electronic device external to the housing in response to graphics and/or video data received from the other device via the divided multi-connector element differential bus connector and operative to communicate the display frames to the other device via the divided multi-connector element differential bus connector;
• and
• the other electronic device comprising:
• a second divided multi-connector element differential bus connector identical to the first divided multi-connector element differential bus connector and connected with the first divided multi-connector element differential bus connector;
• and
• a display engine and corresponding frame buffer wherein the frame buffer is operatively coupled to store display frames received from the electronic device via the second divided multi-connector element differential bus connector and operative to cause the display frames to be displayed on the display.

A method comprising:

• reducing power of a rendering engine of a first graphics processor and leaving a display engine of the first graphics processor capable of outputting display frames from a corresponding first frame buffer to a display;
• rendering a display frame by a second graphics processor while the rendering engine of the first graphics processor is in a reduced power state;
• storing the rendered frame in a corresponding second frame buffer of the second graphics processor;
• copying the rendered frame from the second frame buffer to the first frame buffer;
• and
• displaying the copied frame in the first frame buffer on a display while the rendering engine of a first graphics processor is in the reduced power state.

A system comprising:

• a first device comprising:
• a first graphics processor that comprises at least a rendering engine and a display engine;
• and
• a corresponding first frame buffer, operatively coupled to the first graphics processor, operative to store rendered frames generated by the rendering engine,
• the first device also being operative to reduce power of the rendering engine of the first graphics processor and leave the display engine of the first graphics processor capable of outputting display frames from the corresponding first frame buffer;
• and
• a second device, in communication with the first device and comprising:
• a second graphics processor and corresponding second frame buffer, the second graphics processor operative to render a display frame while the rendering engine of the first graphics processor is in a reduced power state and store the rendered frame in the corresponding second frame buffer of the second graphics processor,
• the second device operative to copy the rendered frame from the second frame buffer to the first frame buffer of the second device;
• and
• the display engine in the first graphics processor of the first device operative to display the copied frame in the first frame buffer on a display while the rendering engine of a first graphics processor is in the reduced power state.

An apparatus comprising:

• a graphics processor and corresponding frame buffer, the graphics processor operative to render a display frame in response to a rendering engine of another graphics processor being in a reduced power state and operative to store the rendered frame in the corresponding frame buffer,
• logic operative to cause copying of the rendered frame from the corresponding frame buffer to a frame buffer of another graphics processor in response to the rendering engine of the other graphics processor being in a reduced power state;
• and
• the display engine in the first graphics processor of the first device operative to display the copied frame in the first frame buffer on a display while the rendering engine of a first graphics processor is in the reduced power state.