US 2009/0157913 A1 · Method for Toggling Non-Adjacent Channel Identifiers During DMA Double Buffering Operations

Abstract

Disclosed are a method, a system and a computer program product for managing direct memory access (DMA) operations in a double buffering system. During direct memory access operations in a computer system, data is transferred from a source memory location to a destination memory location with minimal use of the computer's processing unit. Double buffering utilizes two separate memory buffers to perform simultaneous DMA operations. Prior to processing a DMA request each buffer in a double buffering system is assigned a channel identification (ID), or tag. When reading, writing, or polling status of data in a buffer, the tag identifies the buffer. A toggle factor is utilized to conveniently switch between each buffer in the double buffering system. Utilizing a toggle factor decreases latencies in DMA operations.

Claims20

Dependent claims

In a data processing system supporting DMA data operations via a double buffering DMA system by which two buffers having separate and distinct DMA channels concurrently conduct DMA data operations, a method comprising:

receiving a first tag and a second tag, wherein said first tag and said second tag respectively provide unique labels of a first memory buffer and a second memory buffer of the double buffering DMA system and which associate the first memory buffer and the second memory buffer with a first DMA channel and a second DMA channel;
and
deterministically toggling between the first memory buffer and the second memory buffer, using the first tag and the second tag, during double buffering DMA data transfer.

A processor chip comprising:

a processor component;
a DMA controller coupled to the processor component;
logic associated with the DMA controller, which logic performs the functions of:
receiving a first tag and a second tag, wherein said first tag and said second tag respectively provide unique labels of a first memory buffer and a second memory buffer of the double buffering DMA system and which associate the first memory buffer and the second memory buffer with a first DMA channel and a second DMA channel;
and
deterministically toggling between the first memory buffer and the second memory buffer, using the first tag and the second tag, during double buffering DMA data transfer.

3 more elements

A data processing system comprising:

a processor;
a memory component coupled to the processor;
a DMA controller coupled to the processor component;
logic associated with the DMA controller, which logic performs the functions of:
receiving a first tag and a second tag, wherein said first tag and said second tag respectively provide unique labels of a first memory buffer and a second memory buffer of the double buffering DMA system and which associate the first memory buffer and the second memory buffer with a first DMA channel and a second DMA channel;
and
deterministically toggling between the first memory buffer and the second memory buffer, using the first tag and the second tag, during double buffering DMA data transfer;

4 more elements

Dependencies are inferred from the claim text.

Method for Toggling Non-Adjacent Channel Identifiers During DMA Double Buffering Operations

Life of this patent

Method for Toggling Non-Adjacent Channel Identifiers During DMA Double Buffering Operations

Life of this patent

Abstract

Claims20