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US 2009/0155494 A1Published application
Method for manufacturing flat substrates
AssigneeOerlikon Trading AG, Truebbach
InventorsHai Tran Quoc, Jerome Villette
Life of this patent
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Abstract
For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a μc-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).
Claims14
A flat substrate member with an extent of at least 2500 cm2 comprising:
- a substrate with a first surface and a second surface;
- and
- a layer stack supported upon said first surface of said substrate, wherein said layer stack comprises
- a first dielectric layer deposited onto said first surface of said substrate;
- a microcrystalline silicon layer deposited onto said first dielectric layer and separated from said substrate by said first dielectric layer;
- a second dielectric layer separated from said first dielectric by said microcrystalline silicon layer;
- and
- a subsequent silicon-containing layer deposited onto said second dielectric layer.
5 more elements
Dependencies are inferred from the claim text.