Clock reproducing and timing method in a system having a plurality of devices

An apparatus for transferring data from a first device to a second device, the data having a period defined by transitions of a clock signal:

• the first device comprising;
• first clock circuitry configured to:
• provide a plurality of first reproduced clock signals in response to a first input clock signal, the phases of the plurality of first reproduced clock signals being differently shifted with the data to each other, and
• produce a first output clock signal in response to at least one of the plurality of first reproduced clock signals;
• and
• first synchronization circuitry for synchronizing the transfer of the data with at least one of the plurality of first reproduced clock signals, the transition of the first output clock signal occurring during the period of the data, the second device comprising:
• second clock circuitry configured to provide a plurality of second reproduced clock signals in response to a second input clock signal derived from the first output clock signal, the phases of the plurality of second reproduced clock signals being differently shifted with the data to each other, and
• first data input circuitry for receiving the data transferred from the first device in response to the second input clock.

A system comprising:

• a controller;
• and
• a plurality of devices that are series-connected, the operation of which is synchronized with a clock signal, each of the devices comprising:
• a phase-locked loop (PLL) configured to be selectively enabled, the PLL providing a plurality of reproduced clock signals in response to an input clock signal while enabled, the reproduced clock signals being differently phase shifted versions of the input clock signal;
• and
• synchronization circuitry for synchronizing the transfer of data with at least one of the reproduced clock signals.

A method for transferring data clocked in accordance with a clock signal, the data having a period defined by transitions of the clock signal, the method comprising:

• selectively enabling or disabling a phase-locked loop (PLL);
• providing a plurality of reproduced clock signals in response to the input clock signal while the PLL is enabled, the reproduced clock signals being differently phase shifted versions of the input clock signal;
• and
• synchronizing the transfer of the data with at least one of the reproduced clock signals.

A method for transferring data from a first device to a second device, the data being clocked in accordance with a clock signal, the data having a period defined by transitions of the clock signal, the method comprising:

• at the first device,
• providing a plurality of reproduced clock signals in response to a first input clock signal, the reproduced clock signals being differently phase shifted versions of the first input clock signal;
• and
• synchronizing the transfer of the data with at least one of the reproduced clock signals, the clock transition of the reproduced clock signal being during the period of the data, the reproduced clock signal being provided as an output clock signal, at the second device,
• providing a plurality of reproduced clock signals in response to the output clock signal from the first device, the reproduced clock signals being differently phase shifted version of the output clock signal from the first device, and
• receiving the data transferred from the first device.