US 2009/0154442 A1 · METHOD AND APPARATUS FOR REDUCING DIGITAL TO ANALOG CONVERSION (DAC) BITS IN FREQUENCY DIVISION MULTIPLE ACCESS (FDMA) SYSTEM

Abstract

A method and an apparatus for reducing Digital-to-Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system reduces a number of the bits for conversion so as to save power and reduce the cost of operation. The method can include generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR); controlling a gain of a signal input to a digital-to-analog converter using the digital signal gain control value; converting a digital signal of the controlled gain to an analog signal using the digital-to-analog converter; and restoring an original signal by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value.

Claims16

Dependent claims

A method for reducing Digital-to-Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system, the method comprising:

(a) generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR);
(b) controlling a gain of a signal input to a digital-to-analog converter by the digital signal gain control value generated in (a);
(c) converting a digital signal of the controlled gain in (b) into an analog signal by the digital-to-analog converter;
and
(d) restoring an original signal by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value from (a).

2 more elements

An apparatus for reducing Digital to Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system, the apparatus comprising:

a dynamic range preprocessor for generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR);
a digital gain normalizer for receiving the digital gain control value generated by the dynamic range preprocessor and for controlling a gain of a signal output to a digital-to-analog converter;
wherein said digital-to-analog converter for converting a digital signal of the controlled gain to an analog signal according to the digital signal gain control value;
and
an analog gain compensator for restoring an original signal by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value.

2 more elements

Dependencies are inferred from the claim text.

Method and apparatus for reducing digital to analog conversion (dac) bits in frequency division multiple access (fdma) system

Life of this patent

Method and apparatus for reducing digital to analog conversion (dac) bits in frequency division multiple access (fdma) system

Life of this patent

Abstract

Claims16