Semiconductor integrated circuit, memory system and electronic imaging device

A semiconductor integrated circuit for fetching read data from at least one DDR-SDRAM operating in synchronization with a clock, and transferring the read data, the semiconductor integrated circuit comprising:

• at least one read buffer each provided for each data strobe signal from each said at least one DDR-SDRAM to fetch read data from the DDR-SDRAM, and transfer the read data;
• at least one latch timing control circuit each provided for each data strobe signal from each said at least one DDR-SDRAM to control a latch timing with which each said at least one read buffer fetches the read data from the DDR-SDRAM based on the data strobe signal from the DDR-SDRAM;
• and
• a read timing control circuit for controlling a read timing with which each said at least one read buffer transfers the read data based on the latch timing of the corresponding latch timing control circuit.

A semiconductor integrated circuit for fetching read data from at least one DDR-SDRAM each operating in synchronization with a clock, and transferring the read data, the semiconductor integrated circuit comprising:

• at least one read buffer each provided for each said at least one DDR-SDRAM to fetch read data from the DDR-SDRAM, and transfer the read data;
• at least one latch timing control circuit each provided for each said at least one DDR-SDRAM to control a latch timing with which each said at least one read buffer fetches the read data from the DDR-SDRAM based on a data strobe signal from the DDR-SDRAM;
• and
• a read timing control circuit for controlling a read timing with which each said at least one read buffer transfers the read data based on the latch timing of the corresponding latch timing control circuit.